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DSP 56001 Handshaked DMA Communication Example
This example illustrates a typical DSP Handshaked DMA communication program.
; DSP Handshaked DMA IO
: (C) Fredrik Noring, Tomas Berndtsson 1994
M_PCC EQU $FFE1 ; Port C Control Register
M_PCDDR EQU $FFE3 ; Port C Data Direction Register
M_PCD EQU $FFE5 ; Port C Data Register
M_CRA EQU $FFEC ; SSI Control Register A
M_CRB EQU $FFED ; SSI Control Register B
M_RX EQU $FFEF ; Serial Receive Data Register
M_TX EQU $FFEF ; Serial Transmit Data Register
M_SR EQU $FFEE ; SSI Status Register
org p:$0
jmp <start
org p:$40
start andi #$fb,omr ; initialize SSI port
movep #%000000000,x:<<M_PCC ; SSI reset
movep #%0100000000000000,x:<<M_CRA
movep #%0011010000000000,x:<<M_CRB
movep #%111001000,x:<<M_PCC
movep #%000110000,x:<<M_PCDDR
movep #%000000000,x:<<M_PCD ; clear frame syncs
jsr <DMA_get ; Receive DMA data
move #0.27,A ; Move value to the 56-bits A register
move #0.31415,y0 ; Move value to the 24-bits y0 register
mac x0,y0,A ; Multiply x0 and y0 and accumulate to A
move A,x0 ; Move the A1 portion of A to x0
jsr <DMA_send ; Send DMA data
jmp <start ; Continue
; DMA I/O routines.
DMA_send movep x0,X:<<M_TX
bset #5,X:<<M_PCD ; start frame sync
_wait jclr #6,X:<<M_SR,_wait ; TDE
bclr #5,X:<<M_PCD ; stop frame sync
rts
DMA_get bset #4,X:<<M_PCD ; start frame sync
_wait jclr #7,X:<<M_SR,_wait ; RDF
bclr #4,X:<<M_PCD ; stop frame sync
movep X:<<M_RX,x0
rts