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AIList Digest Volume 2 Issue 038

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AIList Digest
 · 1 year ago

AIList Digest            Friday, 30 Mar 1984       Volume 2 : Issue 38 

Today's Topics:
Planning - JPL Planning System,
Expert Systems - Legal Expert Systems,
Architectures - Concurrency vs. Parallelism,
News - New VLSI CAD Interest List,
Seminars - Concurrency and Logic
----------------------------------------------------------------------

Date: 29 Mar 1984 1634-PST
From: WAXMAN@USC-ECL.ARPA
Subject: JPL Planning System


Len Friedman at JPL; Friedman@USC-ECLA did the work on the planning
system someone asked about.

[...]

MILT WAXMAN
WAXMAN@USC-ECLA

------------------------------

Date: Thu 29 Mar 84 15:18:10-PST
From: Anne Gardner <GARDNER@SU-SCORE.ARPA>
Subject: Legal expert systems

The seminar notice you referred to in Ailist was my oral. I'm still
finishing off the dissertation, which is called "An Artificial Intelligence
Approach to Legal Reasoning." For a sketch of what it's about, see
the 1983 AAAI proceedings, in which I had a paper.

--Anne Gardner

[Jeff Rosenschein@SU-SCORE also pointed out Anne's work. -- KIL]

------------------------------

Date: 29 Mar 84 17:36:35 EST
From: MCCARTY@RUTGERS.ARPA
Subject: judicial expert systems

I saw your query in the recent AILIST Digest. Are you familiar with the
TAXMAN project at Rutgers? Strictly speaking, this is not a "judicial expert
system," since our goal at the present time is not to build a large practical
system for use by lawyers. Instead, we are exploring a number of theoretical
issues about the representation of legal rules and legal concepts, and the
process of legal reasoning and legal argumentation. We believe that this
is an essential step for the construction of sophisticated expert systems
for lawyers in the future. Some recent references:

McCarty, L.T., "Permissions and Obligations," IJCAI-83, pp. 287-294.

McCarty, L.T., and Sridharan, N.S., "The Representation of an Evolving
System of Legal Concepts: II. Prototypes and Deformations," IJCAI-81,
pp. 246-253.

McCarty, L.T., and Sridharan, N.S., "A Computational Theory of Legal
Argument," Technical Report LRP-TR-13, Laboratory for Computer
Science Research, Rutgers University (1982).

McCarty, L.T., "Intelligent Legal Information Systems: Problems and
Prospects," Rutgers Computer and Technology Law Journal, Vol. 9,
No. 2, pp. 265-294 (1983).

This latter article articulates some of our ideas about practical systems,
and discusses several related projects by other researchers.


Thorne McCarty

------------------------------

Date: Thu, 29 Mar 84 17:52:33 PST
From: Philip Kahn <kahn@UCLA-CS.ARPA>
Subject: Non-Von's are not Von's

The ``parallel architectures community'' has mostly been interested
in novel computer architectures to accelerate numeric computation
(usually represented as Fortran codes).

What are the fundamental characteristics of AI computation that
distinguish it from more conventional computation?
Indeed, are there really any differences at all?


I disagree with the claim that the "parallel architectures community"
has been trying to find a parallel Fortran. Indeed, that is not possible,
since the best that could be attained would be *concurrent seriality*.
On the whole, I feel acceleration of numerical computation is not the primary
goal of those researching parallel architectures. Rather, I feel the primary
thrust of this work has been to define inherently parallel structures and
their possible applications.

Before we all espouse our personal viewpoints on this subject, I
feel it might be useful to agree upon our terms; they seem to vary from
person to person. *Serial* is a single step move through a computation.
*Concurrent serial* is the simultaneous processing of more than one
serial computation. *Parallel* is the local computation of global properties
by dedicated processors.

Yes! There are differences between AI-motivated parallel
computation and conventional computation. Conventional computation runs
on your standard store-bought Von Neumann machine that runs in a *serial*
fashion. "Pseudo-conventional" machines are able to run *concurrent serial*
programs (e.g., Ada, Concurrent Pascal, etc.) utilizing several Von Neumann
processors. *A truly parallel machine computes global properties based upon
local criteria.* Each "criteria" is locally computed via a dedicated
processor. The design of parallel machines is a tough problem.
A growing number of researchers feel that
*cellular automata* are the building block of all parallel structures.
The design of parallel machines using cellular automata involves the design
of local consistency conditions, oscillation behavior, equilibrium effects,
and a myriad of other non-conventional subjects.
Thus, I feel that there are in fact significant differences between parallelism
and "conventional" methods.

------------------------------

Date: Thu, 29 Mar 84 12:54 PST
From: ANDERSON.ES@Xerox.ARPA
Reply-to: Anderson <Anderson.es@Xerox.ARPA>
Subject: NEW VLSI CAD INTEREST DL

This is to announce a new distribution list for the purpose of
discussing issues and exchanging ideas pertaining to VLSI Computer Aided
Design and Layout.

I hope for this DL to encompass a broad range of topics including but
not limited to: VLSI CAD/CAE/CAM hardware, software, layout, design,
techniques, programming, fracturing, PG, plotting, maintenance, vendors,
bugs, workstations, DRC, ERC, system management, peripheral equipment,
design verification, testing, benchmarking, archiving procedures, etc.
etc.

The distribution list itself resides on the Xerox Ethernet. Ethernet
users can send messages to CADinterest^.es. Arpanet, Milnet, Usenet,
and other Internet users can send messages to CADinterest^.es@PARC-MAXC.
[You will probably need to use quotes to get the special symbol through
your mailer: "CADinterest^.es"@PARC-MAXC. -- KIL]

[...]

Anyone on the Xerox Ethernet may add themselves using Maintain.
Arpanet, Milnet, Usenet, and other Internet users should send a request
to me (Anderson.es@PARC-MAXC) and I will add you to the DL. I will also
add whole DL's if requested by the owner.

For now, there are no rules set for this DL. Depending on how large it
gets, I hope to keep it as anything goes and see what happens for a
while. I will wait a week before sending any messages to the DL in
order to allow people to be added to the DL. If we get some good
informative discussions going, I will try to archive the responses or
maybe go to a digest format. Thank you for your indulgance.

Craig Anderson
VLSI CAD Lab Supervisor
Xerox Corp.
El Segundo, Ca.
213-536-7299

------------------------------

Date: Wed 28 Mar 84 23:40:00-PST
From: Al Davis <ADavis at SRI-KL>
Subject: John Conery Seminar Friday the 30th

[Forwarded from the SRI-AI bboard by Laws@SRI-AI.]

Seminar

Friday, March 30
10:00 a.m. in the AI Conference Room

Fairchild AI Labs, 4001 Miranda Ave., Palo Alto

by

John S. Conery
University of Oregon

Title: The AND/OR Process Model for Parallel Interpretation of Logic
Programs.

Abstract: In contrast to the traditional depth first sequential process
tree search used for logic program evaluation, this talk presents the AND/OR
process model. It is a method for interpretation by a system of
asynchronous, independent processes that communicate only by messages.
The method makes it possible to exploit two distinct forms of
parallelism. OR parallelism is obtained from evaluating
nondeterministic choices in parallel. AND parallelism arises in the
execution of deterministic functions, such as matrix multiplication or
divide and conquer algorithms, that are inherently parallel. The two
forms of parallelism can be exploited at the same time. This means
AND parallelism can be applied to clauses that are composed of several
nondeterministic components, and it can recover from incorrect choices
in the solution of these components. In addition to defining parallel
computations, the model provides a more defined procedural semantics
for logic programs; that is, parallel interpreters based on this model
are able to generate answers to queries that cause standard
interpreters to go into an infinite loop. The interpretation method
is intended to form the theoretical framework of a highly parallel non
von Neumann computer architecture; the talk concludes with a
discussion of issues involved in implementing the abstract interpreter
on a multiprocessor.
al

Notes to visitors: Arrive at Fairchild between 9:45 and 10:00 and go
to the guard and tell him you are there to visit Al Davis at X4385.
They will call me and someone will come down and get you and haul you
off to the AI conference room.

------------------------------

Date: 29 Mar 84 1157 PST
From: Carolyn Talcott <CLT@SU-AI.ARPA>
Subject: Seminar in foundations of mathematics (Professor Kreisel)

[Forwarded from the CSLI bboard by Laws@SRI-AI.]

Organizational meeting

TIME: Tuesday, Apr. 3, 4:15 PM
PLACE: Philosophy Dept. Room 92 (seminar room)
TOPIC: Logic and parallel computation.

We will begin by examining some recent papers where
parallel computation is used in interesting ways
to obtain better algorithms.

The logical part will be to investigate how efficient
algorithms using parallel computation might be extracted
from infinite proof trees by applying transformations
that use only finite amounts of information.

At the first meeting these ideas will be explained in some more detail.
Ideas and suggestions will be welcome.

The seminar is scheduled to meet Tuesdays at 4:15, but can
be changed if there are conflicts.

------------------------------

End of AIList Digest
********************

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