One meg upgrades for Atari ST
TITLE: *** ALERT! ALERT! ALERT! ***
Checked into my arpa/uucp mail node for the first time in about a month and found the following message. Could make for some interesting complaints about the Feb BEST OF BIX section.
This is a modification to gert's original posting. You should read it carefully if you are planning to upgrade your ST as there are some important modifications. I got this from a posting on net.micro.atari.
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>From bammi@cwruecmp.UUCP (Jwahar R. Bammi) Wed Dec 18 13:09:35 1985
Path: umcp-cs!seismo!harvard!think!mit-eddie!genrad!decvax!cwruecmp!bammi
Newsgroups: net.micro.atari
Subject: Re: one meg upgrades - PLEASE READ or fry your ST
References: <157@imagen.UUCP>
~~~~~~~~~~~~~~~~~~~pop goes the ST~~~~~~~~~~~~~~~~~~~
i just fried my ST and after talking to atari and my local dealer i have tracked down the problem. It is related to the 1 Meg upgrade and the new proms, it seems that the early postings of "how to upgrade ...." left out 4 critical resisters (60 ohm 10% tol); 2 must be placed on the CAS lines and 2 on the RAS lines, all 4 go on the MMU (i know it isnt really an MMU) side. the upgrade will work fine w/o the resistors until you put in the new proms, the difference in the current drain will cost you all your memory chips and possibly the MMU.
god bless Lily St. Cyr
-Rocky Horror Picture Show
Name: James Turner
Mail: Imagen Corp. 2650 San Tomas Expressway, P.O. Box 58101 Santa Clara, CA 95052-9400
AT&T: (408) 986-9400
UUCP: ...{decvax,ucbvax}!decwrl!imagen!turner
After reading the above article, I downloaded the revised procedure from Compu Serve. I have had the upgrade for about 3 months, and has worked without a flaw. I would have probably added the proms without the resistors. Thanks to Mr. Turner for the warning.
Here is a copy of the revised procedure:
NOTE: This is an REVISED,TESTED version of the original text downloaded from CompuServe. December 6, 1985
(This was REVISED AND TESTED by an anonymous engineer on Atari's development staff. The addition of the resistors should provide a long life to your machine, but the warning below is STILL IN EFFECT. This is not an official sanction of the modification. USE WITH CARE!!!)
Here's the 1 Meg upgrade directions:
I have brought this over un-edited from the arpanet info-st mailing list. I TAKE NO RESPONSIBILITY FOR ITS CONTENT OR ACCURACY. I HAVE NOT TRIED THIS MODIFICATION ON MY OWN ST AS YET. I AM PASSING THIS ALONG TO THOSE WHO DO WISH TO TRY IT. FOLLOW THE DIRECTIONS AT YOUR OWN RISK.
--Dwight McKay (75776,1521)
From: gert@pescadero
WARNING: This is a hardware modification that will void the warranty of your 520ST. If you do not have the appropriate tools or experience you have a substantial chance of ruining your 520ST. Proceed at your own risk! This modification has been in my 520ST without any problems for 6 days now. However, I have (of course) not checked with knowledgable sources at Atari to verify if this modification endangers the long term machine reliability and/or software compatibility (I suspect it may endanger their software compatibility if enough of us do it!)
Tools & components needed :
16 256k * 1 RAM chips, 150 ns access time type, e. g. NEC 41256C-15 (available at e. g. Fry's Electronics, Sunnyvale, CA for $2.77 each)
A good quality, preferably temperature controlled soldering iron, with a miniature tip (tip should be narrow enough to avoid touching 2 I. C. pins at the same time). E. g. Weller type soldering station.
Good quality resin core solder (thin).
Approximately 4 foot of #24 AWG insulated wire and a good stripper for it and 2 feet of #22 AWG solid tinned copper bus wire. You will have to route 3 wires over a sequence if I.C. pins.
Desoldering wick and solder suction tool.
Philips type screwdriver (for opening your ST), tweezers, pliers, etc.
A steady hand and self-confidence.
Explanation of the modification :
(Please read the rest of this document before starting. It may save you time and an 520ST)
The current memory inside the 530ST consists of 16 256K*1 RAM chips. Address (A0..A8) lines are common to all those chips. The WriteEnable line is also common to all chips. Data (in and out) lines are of course individual. The RAS (row-address strobe) line is common to all chips. The 8 chis foring the high order byte group have one common CAS line, and the 8 forming the low order byte group have one common CAS line (CAS is used as enable for write operations, such that WriteEnable can be common to both groups). The high order group from MSB to LSB consists of U45, 44, 43, 42, 38, 34, 33, 32. The low order group of U30, 29, 28, 25, 24, 28, 27, 26. Note that all chips are adjacent, though the numbering has gaps. RAS0, CAS0H, and CAS0L are supplied from U1 pin 8,6 and 7 respectively (The 0 indicates bank 0)
Bank 1 that you are going to build in will be "piggy-backed" on top of the current chips, where all pins of the new chips EXCEPT RAS (pin 4) and CAS (pin 15) are soldered to the old chips equivalent pins. Thus they will end up sharing addresses, data, WriteEnable and power and ground with the existing chips.
All RAS pis of the new chips are wired together and will be supplied with the "RAS1" signal generated on pin 18 of U15 (the memory controller, marked 3H-2119C or so). The CAS pins of the 8 new high order byte chips (on top of U45..U32) are wired together and supplied from the "CAS1H" signal generated on pin 22 of U15. Analogously, the CAS pins of the new U30 to U16 are wired together and supplied with "CAS1L" from pin 21 of U15.
How to go about it:
Step 1: Open up your 520ST, pull off the keyboard connector and remove the main circuit card from its top and bottom shielding. Make sure to remember which screws go where and note the keyboard connector orientation.
Step 2: Desolder all of the capacitors adjacent to the existing RAM chips. (DO NOT SKIP THIS STEP. You'll lose time if you do, and worse, the modification will no be reliable since you can't solder pins obstructed by the capacitors reliably (if at all)). To desolder them, I found it easiest to heat the island on the non component side, and bend the wires straight. After doing that or each capacitor, turn over to the component side and heat the islands wile pulling the capacitor out with the tweezers.
Step 3: Open up the holes of all the desoldered capacitors, using a combination of de-soldering wick and suction tool. Do this from the non component side. If certain holes are difficult to open up, you may want to use a wood splinter. (push it through while heating). Be carefull to remove all solder debris!! THE REASON for opening the holes NOW is that they will be less accessible once you've done the other steps! Patience is a virtue.
(NOTE: Step 2 & 3 are the only ones that may damage your ST PC board. Be sure not to use excessive force while pulling out the capacitors. If you damage your PC board anyway, cure the problem now and not later).
Step 4: In this step we will piggyback the new RAM's on top of the old oes. Be sure to connect all pins except pin 4 (RAS) and 15 (CAS). The best way to go about this is to do chip by chip. First, bend the pins of the new RAM's such that hey are perpendicular to the package (instead of having slightly spread "cowboy legs"). Use pliers to bend pin 4 and 15 such that the legs are 180 degrees from their normal position, so they stick up in the air above the plane of the top surface of the chips. Don't make an absolute sharp 180 degree bend since some manufacturers' pins may snap off. Leave a little curve in the leg, but insure that is above the plane of the top surface of the chip.
Using #22 AWG to #16 AWG tinned solid copper wire you will form three buses along the top surface of the new d-rams. Cut a #22 AWG solid copper wire the length of the 16 d-rams on the PCB. The RAS bus is formed by soldering all the pin 4's of the new d-rams to the solid copper wire. The bus wire must be seated against the top surface of the new d-rams without a gap. This insures clearance between the top shield and the pins of the d-rams.
After soldering all 16 d-rams to the bus clip off any portion of the pins that extend above the top of the bus wire. Now cut a #22 AWG solid copper wire the length of the 16 d-rams. Place the bus wire along the top surface of the new d-rams in contact with all the pin 15's of the new d-rams. Solder every pin 15 to this bus and as above insure that the wire is seated solidly against the top surface of the new d-rams. Cut off all excess pin length sticking up above the top of the bus wire. Using diagonal cutters remove the section of the bus connecting the new U30 pin 15 to the new U32 pin 15. This divides the bus in half with the new U16, 17, 18, 24, 28, 29 having a common pin 15. The new U32, 33, 34, 38, 42, 43, 44, 45 now have a common pin 15, separated from the other common bus.
(NOTE: until step 6 is finished, do no in any way apply power to your ST. This intermediate state of affairs will damage your memory chips!!)
Step 5: Remount all the desoldered capacitors. Bend the pins like they were before resoldering, such that they will not touch the lower shielding. Solder from the non component side.
Step 6: Orient the 520ST PCB so that you are looking at the solder side of the PCB (non-component side), with the row of d-rams nearest you. Find the double square pattern of pads at the 68-pin socket of the memory controller, U15 (3H2119). The following is a guide to locating the six memory controller pins necessary to complete the wiring. The socket is numbered counterclockwise, starting with pin 1, the square pad (look closely) in the middle of the bottom outside row. The sequence, moving counterclockwise from pin 1, first on the outside square ONLY: (NOTE: the sequence ")(" means to make a 90-degree turn counterclockwise, i.e. around the corner)
1,3,5,7,9)(10,12,14,16,18,20,22,24,26)(27,29,31,33,35,37,39, 41,43)(44,46,48,50,52,54,56,58,60)(61,63,65,67
The sequence, moving counterclockwise along the inside square only, and starting with the left side of the bottom row:
(62,64,66,68,2,4,6,8)(11,13,15,17,19,21,23,25)(28,30,32,34,3 6,38,40,42)(45,47,49,51,53,55,57,59)
Six 68-ohm 1/4W plus/minus 10% carbon film resistors must be added when adding memory. These series terminating resistors minimize undershoot which may damage BOTH BANKS of d-rams if omitted. Solder a 68-ohm resistor to pin 18 of U15, RAS1. Solder a #24 AWG stranded wire from the remaining end of the 68-ohm resistor to the pin 4 bus (RAS) of all the new d-rams. that is the new U16, 17, 18, 24, 25, 28, 29, 30, 32, 33, 34, 38, 42, 43, 44, and 45.
Solder a 68-ohm resistor to pin 22 of U15, CASH1. Solder a #24 AWG stranded wire from the remaining end of the 68-ohm resistor to pin 15 bus (CAS) of the new U45,44,43,42,38,34,33,32.
Solder a 68-ohm resistor to pin 21 of U15, CASIL. Solder a #24 AWG stranded wire from the remaining end of the 68-ohm resistor to pin 15 bus (CAS) of the new U30, 29,28,25,24,18,17,16.
For best results in all three cases above solder the wires coming from the resistors to the middle of the three bus wires in a "T" fashion rather than at one end of the buses.
Use a continuity tester to find the following three traces -- do not depend on visual inspection. Now install three 68-ohm series terminating resistors in the original 512K bank of ram. Be very careful while soldering to these narrow traces, since excessive heat can easily lift a trace from the board. Use an Exacto knife to gently remove solder mask from traces.
Cut the trace leading from pin 8, RAS0, of U15 near U15. Solder a 68-ohm resistor in series with the trace.
Cut the trace leading from pin 6, CAS0H, of U15 near U15. Solder a 68-ohm resistor in series with the trace.
Cut the trace leading from pin 7, CAS0L, of U15 near U15. Solder a 68-ohm resistor in series with the trace.
Step 7: Sit back. Use Brain. Do you feel confident about the quality of your work? No mistakes? Check everything once again if you are but a little uncertain. Applying power with errors might make your ST into a decorative, nonfunctional piece of art. OK. Either rebuild your ST into its shielding and cabinet, or put it onto a surface clear of wires and solder remians and connect it to monitor, disk and supply. Boot it.
It it boots, you're probably there. Test if the new memory works by looking at the phystop variable ($42E) with SID if you have the developer stuff. It should read $100000 (1M hex). Also note that memcntlr ($424) now holds 5 instead of 4, and that v_bas_ad ($44E) now holds $F80000 (screen bitmap origin). If you don't have the developer stuff, try a single drive copy and check that you get the whole disk in one buffer instead of two.
If the new memory does not seem to exist, use SID to deposit and retrieve words on locations $80000 and up (1/2 Meg hex). If bit errors occur, the ST bootROM did not detect the extension (it checks all bits of 512 locations by testing a psedo random sequence, before accepting a memory bank). Try to pin point the faulty chip(s) and remove the error.
If it doesn't boot, you're in trouble. I'm sorry. It is difficult to give hints on what to do here. So many possibilities. Desoldering the new chips probably won't work (if the old ones were functional, the ST would still boot). Check for hidden short:circuit on the RAM pins. May also be that you have a flaky new pin connection.
That's all there is...
--
Jwahar R. Bammi
Usenet: .....!decvax!cwruecmp!bammi
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