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R3000-Instruction-Set
The Playstation R3000 CPU.
R3000-Instruction-Set
Expl. :
rx is a register of the r3000 .
Rx is a register of the coprocessor0 of the r3000.
immediate(rx) means : Address = rx + immediate .
"immediate" is always a 16-bit constant
HI and LO are the two 32bit registers of the multiplier/divider of the r3000.
"shamt" is always a 5-bit constant
"target" is always a 26-bit constant
Store/Load Instructions (Communication with the main memory):
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sb r1,immediate(r2) : ("store byte") Stores lowest byte of r1 in addressed byte .
sh r1,immediate(r2) : ("store halfword") Stores lowest halfword of r1 in addressed halfword.
sw r1,immediate(r2) : ("store word") Stores r1 in addressed word.
lb r1,immediate(r2) : ("load byte") Loads r1 with addressed byte.
lbu r1,immediate(r2) : ("load byte unsigned") Loads r1 with addressed byte(unsigned).
lh r1,immediate(r2) : ("load halfword") Loads r1 with addressed haldword.
lhu r1,immediate(r2) : ("load halfword unsigned") Loads r1 with addressed halfword(unsigned).
lw r1,immediate(r2) : ("load word") Loads r1 with addressed word.
Arithmetic and Logical Instructions (Reg + Immediate) :
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add r1,r2,r3 : ("add") Adds r2 and r3 and stores result in r1.
addu r1,r2,r3 : ("add unsigned") Adds r2(unsigned) and r3(unsigned) and stores result
in r1.
sub r1,r2,r3 : ("subtract") Subtracts r3 from r2 and stores result in r1.
subu r1,r2,r3 : ("subtract unsigned") Subtracts r3(unsigned) from r2(unsigned) and
stores result in r1.
addi r1,r2,immediate : ("add immediate") Adds r2 and immediate(signed) and stores result in r1.
addiu r1,r2,immediate : ("add immediate unsigned") Adds r2(unsigned) and immediate(unsigned)
and stores result in r1.
mult r1,r2 : ("multiply") Multiplies r1 by r2 and stores result (64bit) in HI/LO .
mult r1,r2 : ("multiply unsigned") Multiplies r1(unsigned) by r2(unsigned) and
stores result (64bit) in HI/LO .
div r1,r2 : ("divide") Divides r1 by r2 and stores quotient (32bit) in LO and the
remainder in HI .
divu r1,r2 : ("divide unsigned") Divides r1(unsigned) by r2(unsigned) and stores
quotient (32bit) in LO and the remainder in HI .
slt r1,r2,r3 : ("set on less than") Sets r1=1 if r2 < r3 , else r1=0;
sltu r1,r2,r3 : ("set on less than unsigned") Sets r1=1 if r2(unsigned) < r3(unsigned) ,
else r1=0;
slti r1,r2,immediate : ("set on less than immediate") Sets r1=1 if r2 < immediate , else r1=0.
sltiu r1,r2,immediate : ("set on less than unsigned immediate") Sets t1=1 if
r2(unsigned) < immediate(unsigned) , else r1=0;
and r1,r2,r3 : ("and") Bitwise AND operation (r2&r3) . Stores result in r1.
or r1,r2,r3 : ("or") Bitwise OR operation (r2|r3) . Stores result in r1.
xor r1,r2,r3 : ("xor") Bitwise XOR operation (r2^r3) . Stores result in r1.
nor r1,r2,r3 : ("nor") Bitwise NOR Operation . Stores result in r1.
andi r1,r2,immediate : ("and immediate") Bitwise AND operation (r2&immediate).Stores result in r1.
ori r1,r2,immediate : ("or immediate") Bitwise OR operation (r2|immediate).Stores result in r1.
xori r1,r2,immediate : ("xor immediate") Bitwise XOR operation (r2^immediate).Stores result in r1.
lui r1,immediate : ("load upper immediate") r1=immediate < < 16.
Shifting Instructions :
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sll r1,r2,shamt : ("shift left logical") Shifts r2 shamt bits to left and stores result
in r1.
srl r1,r2,shamt : ("shift right logical") Shifts r2 shamt bits to right and stores result
in r1.
sra r1,r2,shamt : ("shift left arithmetic") Shifts r2 shamt bits to right , restore sign
and store result in r1.
sllv r1,r2,r3 : ("shift left logical variable") Shifts r2 r3 bits to left and stores
result in r1.
srlv r1,r2,r3 : ("shift right logical variable") Shifts r2 r3 bits to right and stores
result in r1.
srav r1,r2,r2 : ("shift left arithmetic variable") Shifts r2 r3 bits to right , restore
sign and store result in r1.
Instructions to handle HI/LO :
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mfhi r1 : ("move from HI") Stores HI in r1 .
mflo r1 : ("move from LO") Stores LO in r1 .
mthi r1 : ("move to HI") Stores r1 in HI .
mtlo r1 : ("move to LO") Stores r1 in LO .
Jump and Branch Instructions :
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j target : ("jump") Jump to target .
jal target : ("jump and link") Store the address of the second instruction
after jal in r31/$31/ra and jump to target .
jr r1 : ("jump register") Jump to address in r1 .
jalr r1 : ("jump register and link") Store the address of the second instruction
after jalr in r31/$31/ra and jump to address in r1 .
beq r1,r2,immediate : ("branch if equal") Branch to immediate if r1==r2.
bne r1,r2,immediate : ("branch if not equal") Branch to immediate if r1!=r2.
blez r1,immediate : ("branch if lower than or equal zero") Branch to immediate if r1 < =0.
bgtz r1,immediate : ("branch if greater than zero") Branch to immediate if r1>0.
bltz r1,immediate : ("branch if lower than zero") Branch to immediate if r1 < 0.
bgez r1,immediate : ("branch if greater than or equal zero") Branch to immediate if r1>=0.
bltzal r1,immediate : ("branch if lower than zero and link") If r1 < 0 store the address
of the second instruction after bltzal in r31/$31/ra and branch to
immediate .
bgezal r1,immediate : ("branch if greater than or equal zero and link") If r1>=0 store the
address of the second instruction after bgezal in r31/$31/ra and branch
to immediate .
Special Instructions :
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syscall : Initialize system-call.
break : Initialize interruption-handling .
mtc0 r1,R1 : ("move to C0") Store r1 (R3000 register) in R1 (Coprocessor0 register).
mfc0 r1,R1 : ("Move from C0") Store R1 ind r1.
rfe : ("Restore from exception") .........
