Dreamcast G2 bus signal timing

The original article, written by jj1odm, is available at http://jj1odm.sizious.com/

@Dreamcast

Published in

Dreamcast

· 16 Sep 2018

1) G2 bus mode

 
byte or word access: 
  /AEN  -__-------------- 
  /BTA  -------_--------- 
  /BTB  -------_--------- 
  ADxx   aADDDDD             D: byte data (AD[15:8] or AD[7:0]) or word data (AD[15:0]) 
  /xBE  -_______---------    /LBE and /UBE (lower byte enable / upper byte enable) 

 long word access: 
  /AEN  -_______--------- 
  /BTA  -------_----_---- 
  /BTB  -------______---- 
  ADxx   aAdddddDDDDD        d: low word data  D: high word data 
  /xBE  -____________----    /LBE and /UBE (lower byte enable / upper byte enable) 
   
  -: one step equal one system clock cycle (40nSEC) 
  a: low word address (A[15:1] lsb 1bit alway '0' {A[0]}) 
  A: high word address (A[28:16] msb 3bit always '0' {A[31:29]}) 
  (There is a possibility that the address overlaps when the SPU side is accessed 
  when the decipherment is done only with low word address.) 

 G2 bus 22pin / 20pin ('/BTA' and '/BTB') controls the access time. (see concept circuit) 
 If this control is not used, it ends automatically by the time-out (1.2uSEC).  
 When a long word is accessed, it is always necessary. 
 (It becomes only the bus cycle of lower word if it doesn't control.) 

 direction information of '/LBE': (read / write operation) 
 read operation: 
  CLK   __--__--__--__--_ 
  /AEN  --________------- 
  /LBE  ------___________    direction (read) / lower byte enable 
  /UBE  ------___________ 

 write operation: 
  CLK   __--__--__--__--_ 
  /AEN  --________------- 
  /LBE  --_______________    direction (write) / lower byte enable 
  /UBE  ------___________ 

  * this timing is word access

Concept circuit.

2) simple bus mode (modem / lan adaptor [HIT-0300] area {0xa0600000 - 0xa06007ff})

 
byte/word/long read access: 
  AD[15:8]   aaaaaaaaaaaaa       a: 8 bit address bus (AD[15:8]) 
  /MODEMCS  ---__________---- 
  /UBE(/RD) -----_______----- 
  /LBE(/WR) ----------------- 
  AD[7:0]       DDDDDDDDD        D: 8 bit data bus (AD[7:0]) 

 byte/word/long write access: 
  AD[15:8]   aaaaaaaaaaaaa       a: 8 bit address bus (AD[15:8]) 
  /MODEMCS  ---__________---- 
  /UBE(/RD) ----------------- 
  /LBE(/WR) -----_______----- 
  AD[7:0]       DDDDDDDDD        D: 8 bit data bus (AD[7:0]) 

 access is long word alignment. 
 only the lowest byte is valid though byte/word/long can be accessed. (In fact 8bit bus)